I am trying to used gem5 to emulate the execution of a program supposed to be on cortex a53.
I am trying to use some ARMv8 instruction that seams not to be implemented. I detected this problem trying to execute a "mrs" instruction, which is basically instruction for System Control Register. Does anyone have already tried something like that ? Is the ARMv8 instruction set completelly implemented ?
FYI, I am using SE mode with cache L2, 8 CPU cores and O3_ARM_v7a_3 cpu type configuration.
I tried different cpu types, but none seams to understand mrs instructions.
Thank you in advance for your support.