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About checking prefetched block hit.

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Before the question,

I simulate gem5 about LLC prefetch in 4-core architecture(L3 shared, L2,L1d,L1i are private).

And I found some miss matches between prefetch hit rate and performance of architecture.

So, I find a issue in source code of gem5.


In mem/cache/cache_impl.hh(http://www.gem5.org/docs/html/cache__impl_8hh_source.html),

Line 570~577: Code checks prefetch hit.

And I think this code miss prefetch hit that command is readExReq.

Before check prefech hit, in function access(~~), line 366, readExReq hit blk is sent to saticfyCpuSideRequest(~).

Line 199~201, invalidate readExReq hit blk, this code flushes blk's status(include BlkHWPrefetched)

As a result, readExReq hit blk can't be check in line 570~577.

This situation makes missmatch in my result.

Source code has problem? or I just miss something?

Thanks for answer.
asked Sep 26 in Coding Guidelines by dhchoi (120 points)

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